Design of Logic Level Pruning Approximate Arithmetic Circuits Using TIGFET.
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| Title: | Design of Logic Level Pruning Approximate Arithmetic Circuits Using TIGFET. |
|---|---|
| Authors: | Naresh, Kattekola1 (AUTHOR) nareshkattekola@gmail.com, Padma Sai, Y.2 (AUTHOR) padmasai_y@vnrvjiet.in, Ganesh, Ch.2 (AUTHOR) ganesh_ch@vnrvjiet.in, Majumdar, Shubhankar3 (AUTHOR) shubuit@gmail.com |
| Source: | Circuits, Systems & Signal Processing. Jan2026, Vol. 45 Issue 1, p647-663. 17p. |
| Subjects: | Computer arithmetic, Field-effect transistors, Electric currents, Approximation algorithms, Electronic circuit design, Transistors |
| Abstract: | The Three Input Gate FET (TIGFET) was designed to include its unique characteristics. As technology advances, the design becomes more complex as the scope of the design needs expands. To reduce complexity and leakage current, a multi-gate design is required for improved performance. TIGFETs are utilized to implement arithmetic circuits. Arithmetic circuits, on the other hand, form the foundation of most computing systems. As the number of functions in a computer system grows, so does the impact of design limitations on its needs. Approximate computing is a technology that allows you to manipulate design constraints by sacrificing precision for certain advantages. The primitive cells are compared to 10 nm FinFET technology, which has area, power, and delay gains of approximately 10–18%, 7–12%, and 9–12%, respectively. The results show that logic-level pruning arithmetic circuits with various approximate designs enhance the power-delay product by 7–93%. [ABSTRACT FROM AUTHOR] |
| Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
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| Header | DbId: egs DbLabel: Engineering Source An: 191289066 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Design of Logic Level Pruning Approximate Arithmetic Circuits Using TIGFET. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Naresh%2C+Kattekola%22">Naresh, Kattekola</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> nareshkattekola@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Padma+Sai%2C+Y%2E%22">Padma Sai, Y.</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> padmasai_y@vnrvjiet.in</i><br /><searchLink fieldCode="AR" term="%22Ganesh%2C+Ch%2E%22">Ganesh, Ch.</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> ganesh_ch@vnrvjiet.in</i><br /><searchLink fieldCode="AR" term="%22Majumdar%2C+Shubhankar%22">Majumdar, Shubhankar</searchLink><relatesTo>3</relatesTo> (AUTHOR)<i> shubuit@gmail.com</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Circuits%2C+Systems+%26+Signal+Processing%22">Circuits, Systems & Signal Processing</searchLink>. Jan2026, Vol. 45 Issue 1, p647-663. 17p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Computer+arithmetic%22">Computer arithmetic</searchLink><br /><searchLink fieldCode="DE" term="%22Field-effect+transistors%22">Field-effect transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+currents%22">Electric currents</searchLink><br /><searchLink fieldCode="DE" term="%22Approximation+algorithms%22">Approximation algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+circuit+design%22">Electronic circuit design</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The Three Input Gate FET (TIGFET) was designed to include its unique characteristics. As technology advances, the design becomes more complex as the scope of the design needs expands. To reduce complexity and leakage current, a multi-gate design is required for improved performance. TIGFETs are utilized to implement arithmetic circuits. Arithmetic circuits, on the other hand, form the foundation of most computing systems. As the number of functions in a computer system grows, so does the impact of design limitations on its needs. Approximate computing is a technology that allows you to manipulate design constraints by sacrificing precision for certain advantages. The primitive cells are compared to 10 nm FinFET technology, which has area, power, and delay gains of approximately 10–18%, 7–12%, and 9–12%, respectively. The results show that logic-level pruning arithmetic circuits with various approximate designs enhance the power-delay product by 7–93%. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1007/s00034-025-03102-z Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 17 StartPage: 647 Subjects: – SubjectFull: Computer arithmetic Type: general – SubjectFull: Field-effect transistors Type: general – SubjectFull: Electric currents Type: general – SubjectFull: Approximation algorithms Type: general – SubjectFull: Electronic circuit design Type: general – SubjectFull: Transistors Type: general Titles: – TitleFull: Design of Logic Level Pruning Approximate Arithmetic Circuits Using TIGFET. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Naresh, Kattekola – PersonEntity: Name: NameFull: Padma Sai, Y. – PersonEntity: Name: NameFull: Ganesh, Ch. – PersonEntity: Name: NameFull: Majumdar, Shubhankar IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 01 Text: Jan2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 0278081X Numbering: – Type: volume Value: 45 – Type: issue Value: 1 Titles: – TitleFull: Circuits, Systems & Signal Processing Type: main |
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