APA (7th ed.) Citation

Anitha, A., & Rooban, S. (2025). A Novel ALU Architecture Implementation using a Sub-Threshold Adiabatic Logic Design for Low-Power Processors. IETE Journal of Research, 71(12), 4136. https://doi.org/10.1080/03772063.2025.2546580

Chicago Style (17th ed.) Citation

Anitha, A., and S. Rooban. "A Novel ALU Architecture Implementation Using a Sub-Threshold Adiabatic Logic Design for Low-Power Processors." IETE Journal of Research 71, no. 12 (2025): 4136. https://doi.org/10.1080/03772063.2025.2546580.

MLA (9th ed.) Citation

Anitha, A., and S. Rooban. "A Novel ALU Architecture Implementation Using a Sub-Threshold Adiabatic Logic Design for Low-Power Processors." IETE Journal of Research, vol. 71, no. 12, 2025, p. 4136, https://doi.org/10.1080/03772063.2025.2546580.