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A Novel Approach: Hybrid Full Adder Design Tailored for Multistage Architecture.

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Title: A Novel Approach: Hybrid Full Adder Design Tailored for Multistage Architecture.
Authors: Kumar, Dinesh1 (AUTHOR) dinesh.2021rel03@mnnit.ac.in, Karuppanan, P.1 (AUTHOR) pkaru@mnnit.ac.in
Source: Circuits, Systems & Signal Processing. Apr2026, Vol. 45 Issue 4, p2633-2654. 22p.
Subjects: Digital electronics, Signal integrity (Electronics), Electronic equipment
Abstract: Design of multistage structures using hybrid full adder (HFA) poses a unique challenge that requires careful consideration and innovative solutions. By harnessing the capabilities of full adders (FAs), complex digital architecture can be achieved with optimal performance. High driving capability and full swing output are crucial for designing cascade structures in digital circuits. It ensures signal integrity, faster operation, precise signal levels, and power efficiency. The HFAs with transmission gate (TG) are crucial in developing multistage structures. The TG offer strong drive strength, allowing the FA to drive to subsequent stages without significant signal degradation. This article proposes a high-speed, low-power HFA cell that delivers full-swing outputs, while offering minimized delay performance. In addition, the 4-bit, 8-bit, 16-bit ripple carry adder circuit utilizing the proposed HFA exhibits substantial improvements, achieving efficiency gains ranging from 3.11 to 49.17% over conventional designs documented in the literature. These results highlight the efficacy of the HFA cell with TG in enhancing the performance of multistage digital circuits. [ABSTRACT FROM AUTHOR]
Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: A Novel Approach: Hybrid Full Adder Design Tailored for Multistage Architecture.
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  Data: <searchLink fieldCode="JN" term="%22Circuits%2C+Systems+%26+Signal+Processing%22">Circuits, Systems & Signal Processing</searchLink>. Apr2026, Vol. 45 Issue 4, p2633-2654. 22p.
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  Data: Design of multistage structures using hybrid full adder (HFA) poses a unique challenge that requires careful consideration and innovative solutions. By harnessing the capabilities of full adders (FAs), complex digital architecture can be achieved with optimal performance. High driving capability and full swing output are crucial for designing cascade structures in digital circuits. It ensures signal integrity, faster operation, precise signal levels, and power efficiency. The HFAs with transmission gate (TG) are crucial in developing multistage structures. The TG offer strong drive strength, allowing the FA to drive to subsequent stages without significant signal degradation. This article proposes a high-speed, low-power HFA cell that delivers full-swing outputs, while offering minimized delay performance. In addition, the 4-bit, 8-bit, 16-bit ripple carry adder circuit utilizing the proposed HFA exhibits substantial improvements, achieving efficiency gains ranging from 3.11 to 49.17% over conventional designs documented in the literature. These results highlight the efficacy of the HFA cell with TG in enhancing the performance of multistage digital circuits. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1007/s00034-025-03255-x
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        Type: general
      – SubjectFull: Signal integrity (Electronics)
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      – SubjectFull: Electronic equipment
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              Text: Apr2026
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