Design of novel multi-valued quantum adder circuit.
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| Title: | Design of novel multi-valued quantum adder circuit. |
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| Authors: | Cheng, Jia-Xin1,2,3 (AUTHOR), Chen, Jia-Le1,2,3 (AUTHOR), Du, Wen-Bo1,2,3 (AUTHOR), Lu, Si-Jun1,2,3,4 (AUTHOR), Bai, Ming-Qiang1,2,3 (AUTHOR) baimq@sicnu.edu.cn, Zhang, Xin-Rui5 (AUTHOR) |
| Source: | Modern Physics Letters A. 6/21/2026, Vol. 41 Issue 19, p1-14. 14p. |
| Subjects: | Quantum gates, Quantum computing, Many-valued logic, Quantum electronics |
| Abstract: | Multi-valued quantum logic presents significant advantages over conventional binary logic, including enhanced information processing capacity and reduced circuit complexity. As a fundamental component of quantum arithmetic units, the efficiency of multi-valued quantum adders is critical to overall system performance. In this paper, a universal construction scheme for multi-valued quantum half adders, full adders, and parallel adders is introduced based on 1-qudit gates and Muthukrishnan–Stroud gates. The proposed design optimizes the carry propagation mechanism from a one-to-one to a one-to-many architecture, thereby reducing the quantum gate count. A key advantage of this approach is the linear scaling of quantum gate size with the system dimension d. The constructed d-valued quantum adder maintains an optimal number of constant inputs and garbage outputs. For dimensions d ≥ 5 , the proposed design demonstrates significant improvements in quantum cost and hardware complexity compared to existing methods. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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