High-Performance Dynamic Feedback Controlbased 8T SRAM using CNTFET Technology.
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| Title: | High-Performance Dynamic Feedback Controlbased 8T SRAM using CNTFET Technology. |
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| Authors: | Kumar, Abhishek1 abkvjti@gmail.com, Sharma, Vipin Kumar1 |
| Source: | Serbian Journal of Electrical Engineering. Feb2026, Vol. 23 Issue 1, p147-161. 15p. |
| Subjects: | Static random access memory, Carbon nanotube field effect transistors, Miniature electronic equipment, Very large scale circuit integration, Feedback control systems, Cost effectiveness of energy consumption |
| Abstract: | Exploration of new materials and device technologies for integrated circuits has become essential due to the exponential growth in demand for high-performance, energy-efficient, and scalable computers. In light of their exceptional electrical and mechanical characteristics, carbon nanotube field-effect transistors (CNTFETs) have emerged as a competitive alternative to traditional Complementary Metal-Oxide-Semiconductor (CMOS) based devices. In this work, a comprehensive overview of recent advancements, challenges, and prospects concerning CNTFET-based Static Random Access Memory (SRAM) cell design. SRAM performance poses significant challenges for VLSI circuits, including power dissipation, operational speed, area efficiency, and leakage current. Technology scaling-induced short-channel effects advocate transitioning from CMOS to CNTFET-based designs. Here, we propose an SRAM design incorporating Dynamic Feedback Control (DFC) features at CMOS 22nm technology nodes. Simulation results conducted using Synopsis HSPICE demonstrate notable enhancements: a 34% reduction in average power consumption, a 95.3% decrease in leakage current, and a 71.6% improvement in delay compared to MOSFET-based SRAM cells. Moreover, energy efficiency for read/write operations improves by 99.6%, and power dissipation is enhanced by 98.5% over MOSFET-based SRAM designs. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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