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Efficient Breadth-First Search on the Cell/BE Processor.

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Title: Efficient Breadth-First Search on the Cell/BE Processor.
Authors: Scarpazza, Daniele Paolo1 dpscarpazza@us.ibm.com, Villa, Oreste2,3 ovilla@elet.polimi.it, Petrini, Fabrizio1 fpetrin@us.ibm.com
Source: IEEE Transactions on Parallel & Distributed Systems. Oct2008, Vol. 19 Issue 10, p1381-1395. 28p. 3 Black and White Photographs, 5 Charts, 8 Graphs.
Subjects: Microprocessors, Parallel computer software, Computer software development, Broadband communication systems, Software architecture, Program transformation, Parallel programs (Computer programs), Computer system design & construction, Algorithms, Systems software, Integrated circuits, Computer software
Abstract: Multicore processors are an architectural paradigm shift that promises a dramatic increase in performance. But, they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper, we describe the challenges involved in designing a Breadth-First Search (BFS) algorithm for the Cell Broadband Engine (Cell/BE) processor. The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations. Using a fine-grained global coordination strategy derived from the Bulk-Synchronous Parallel (BSP) model, we have derived an accurate performance model that has guided the implementation and the optimization of our algorithm. Our experiments show an almost linear scaling over the number of used synergistic processing elements in the Cell/BE platform and compares favorably against other systems. On graphs that offer sufficient parallelism, the Cell/BE is typically an order of magnitude faster than conventional processors, such as the AMD Opteron, the Intel Pentium 4, and the Intel Woodcrest and custom-designed architectures such as the MTA-2 and BlueGene/L. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
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Abstract:Multicore processors are an architectural paradigm shift that promises a dramatic increase in performance. But, they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper, we describe the challenges involved in designing a Breadth-First Search (BFS) algorithm for the Cell Broadband Engine (Cell/BE) processor. The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations. Using a fine-grained global coordination strategy derived from the Bulk-Synchronous Parallel (BSP) model, we have derived an accurate performance model that has guided the implementation and the optimization of our algorithm. Our experiments show an almost linear scaling over the number of used synergistic processing elements in the Cell/BE platform and compares favorably against other systems. On graphs that offer sufficient parallelism, the Cell/BE is typically an order of magnitude faster than conventional processors, such as the AMD Opteron, the Intel Pentium 4, and the Intel Woodcrest and custom-designed architectures such as the MTA-2 and BlueGene/L. [ABSTRACT FROM AUTHOR]
ISSN:10459219
DOI:10.1109/TPDS.2007.70811