Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU.

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Title: Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU.
Authors: Egger, Bernhard1,2 bernhard.egger@samsung.com, Seungkyun Kim3,4 seungkyun@aces.snu.ac.kr, Choonki Jang4 choonki@aces.snu.ac.kr, Jaejin Lee1,4 jlee@cse.snu.ac.kr, Sang Lyul Min1,4 symin@archi.snu.ac.kr, Heonshik Shin1,4 shinhs@snu.ac.kr
Source: IEEE Transactions on Computers. Aug2010, Vol. 59 Issue 8, p1047-1062. 16p.
Subjects: Compilers (Computer programs), Mathematical optimization, Mathematical programming, Embedded computer systems, Computer programming
Abstract: We propose a code scratchpad memory (SPM) management technique with demand paging for embedded systems that have no memory management unit. Based on profiling information, a postpass optimizer analyzes and optimizes application binaries in a fully automated process. It classifies the code of the application including libraries into three classes based on a mixed integer linear programming formulation: External code is executed directly from the external memory. Pinned code is loaded into the SPM when the application starts and stays in the SPM. Paged code is loaded into/unloaded from the SPM on demand. We evaluate the proposed technique by running 14 embedded applications both on a cycle-accurate ARM processor simulator and an ARM1136JF-S core. On the simulator, the reference case, a four-way set-associative cache, is compared to a direct-mapped cache and an SPM of comparable die area. On average, we observe an improvement of 12 percent in runtime performance and a 21 percent reduction in energy consumption. On the ARM11 board, the reference case run on the 16-KB four-way set-associative cache is compared to the demand paging solution on the 16-KB SPM, optionally supported by the cache. The measured results show both a runtime performance improvement and a reduction of the energy consumption by 23 percent, on average. [ABSTRACT FROM AUTHOR]
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  Data: Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU.
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  Data: <searchLink fieldCode="AR" term="%22Egger%2C+Bernhard%22">Egger, Bernhard</searchLink><relatesTo>1,2</relatesTo><i> bernhard.egger@samsung.com</i><br /><searchLink fieldCode="AR" term="%22Seungkyun+Kim%22">Seungkyun Kim</searchLink><relatesTo>3,4</relatesTo><i> seungkyun@aces.snu.ac.kr</i><br /><searchLink fieldCode="AR" term="%22Choonki+Jang%22">Choonki Jang</searchLink><relatesTo>4</relatesTo><i> choonki@aces.snu.ac.kr</i><br /><searchLink fieldCode="AR" term="%22Jaejin+Lee%22">Jaejin Lee</searchLink><relatesTo>1,4</relatesTo><i> jlee@cse.snu.ac.kr</i><br /><searchLink fieldCode="AR" term="%22Sang+Lyul+Min%22">Sang Lyul Min</searchLink><relatesTo>1,4</relatesTo><i> symin@archi.snu.ac.kr</i><br /><searchLink fieldCode="AR" term="%22Heonshik+Shin%22">Heonshik Shin</searchLink><relatesTo>1,4</relatesTo><i> shinhs@snu.ac.kr</i>
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  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Computers%22">IEEE Transactions on Computers</searchLink>. Aug2010, Vol. 59 Issue 8, p1047-1062. 16p.
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  Data: <searchLink fieldCode="DE" term="%22Compilers+%28Computer+programs%29%22">Compilers (Computer programs)</searchLink><br /><searchLink fieldCode="DE" term="%22Mathematical+optimization%22">Mathematical optimization</searchLink><br /><searchLink fieldCode="DE" term="%22Mathematical+programming%22">Mathematical programming</searchLink><br /><searchLink fieldCode="DE" term="%22Embedded+computer+systems%22">Embedded computer systems</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+programming%22">Computer programming</searchLink>
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  Data: We propose a code scratchpad memory (SPM) management technique with demand paging for embedded systems that have no memory management unit. Based on profiling information, a postpass optimizer analyzes and optimizes application binaries in a fully automated process. It classifies the code of the application including libraries into three classes based on a mixed integer linear programming formulation: External code is executed directly from the external memory. Pinned code is loaded into the SPM when the application starts and stays in the SPM. Paged code is loaded into/unloaded from the SPM on demand. We evaluate the proposed technique by running 14 embedded applications both on a cycle-accurate ARM processor simulator and an ARM1136JF-S core. On the simulator, the reference case, a four-way set-associative cache, is compared to a direct-mapped cache and an SPM of comparable die area. On average, we observe an improvement of 12 percent in runtime performance and a 21 percent reduction in energy consumption. On the ARM11 board, the reference case run on the 16-KB four-way set-associative cache is compared to the demand paging solution on the 16-KB SPM, optionally supported by the cache. The measured results show both a runtime performance improvement and a reduction of the energy consumption by 23 percent, on average. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IEEE Transactions on Computers is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/TC.2009.188
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        Text: English
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      – SubjectFull: Mathematical optimization
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      – SubjectFull: Mathematical programming
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      – SubjectFull: Embedded computer systems
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      – SubjectFull: Computer programming
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      – TitleFull: Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU.
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              Text: Aug2010
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