Multi-Kepler GPU vs. multi-Intel MIC for spin systems simulations.

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Title: Multi-Kepler GPU vs. multi-Intel MIC for spin systems simulations.
Authors: Bernaschi, M.1 massimo.bernaschi@cnr.it, Bisson, M.1 mauro.bis@gmail.com, Salvadore, F.2 f.salvadore@cineca.it
Source: Computer Physics Communications. Oct2014, Vol. 185 Issue 10, p2495-2503. 9p.
Subjects: Graphics processing units, Multicore processors, Asynchronous circuits, Computer architecture, Source code, Model-integrated computing
Abstract: We present and compare the performances of two many-core architectures: the Nvidia Kepler and the Intel MIC both in a single system and in cluster configuration for the simulation of spin systems. As a benchmark we consider the time required to update a single spin of the 3D Heisenberg spin glass model by using the Over-relaxation algorithm. We present data also for a traditional high-end multi-core architecture: the Intel Sandy Bridge. The results show that although on the two Intel architectures it is possible to use basically the same code, the performances of a Intel MIC change dramatically depending on (apparently) minor details. Another issue is that to obtain a reasonable scalability with the Intel Phi coprocessor (Phi is the coprocessor that implements the MIC architecture) in a cluster configuration it is necessary to use the so-called offload mode which reduces the performances of the single system. As to the GPU, the Kepler architecture offers a clear advantage with respect to the previous Fermi architecture maintaining exactly the same source code. Scalability of the multi-GPU implementation remains very good by using the CPU as a communication co-processor of the GPU. All source codes are provided for inspection and for double-checking the results. [ABSTRACT FROM AUTHOR]
Copyright of Computer Physics Communications is the property of Elsevier B.V. and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Multi-Kepler GPU vs. multi-Intel MIC for spin systems simulations.
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  Data: <searchLink fieldCode="AR" term="%22Bernaschi%2C+M%2E%22">Bernaschi, M.</searchLink><relatesTo>1</relatesTo><i> massimo.bernaschi@cnr.it</i><br /><searchLink fieldCode="AR" term="%22Bisson%2C+M%2E%22">Bisson, M.</searchLink><relatesTo>1</relatesTo><i> mauro.bis@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Salvadore%2C+F%2E%22">Salvadore, F.</searchLink><relatesTo>2</relatesTo><i> f.salvadore@cineca.it</i>
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  Data: We present and compare the performances of two many-core architectures: the Nvidia Kepler and the Intel MIC both in a single system and in cluster configuration for the simulation of spin systems. As a benchmark we consider the time required to update a single spin of the 3D Heisenberg spin glass model by using the Over-relaxation algorithm. We present data also for a traditional high-end multi-core architecture: the Intel Sandy Bridge. The results show that although on the two Intel architectures it is possible to use basically the same code, the performances of a Intel MIC change dramatically depending on (apparently) minor details. Another issue is that to obtain a reasonable scalability with the Intel Phi coprocessor (Phi is the coprocessor that implements the MIC architecture) in a cluster configuration it is necessary to use the so-called offload mode which reduces the performances of the single system. As to the GPU, the Kepler architecture offers a clear advantage with respect to the previous Fermi architecture maintaining exactly the same source code. Scalability of the multi-GPU implementation remains very good by using the CPU as a communication co-processor of the GPU. All source codes are provided for inspection and for double-checking the results. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Computer Physics Communications is the property of Elsevier B.V. and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1016/j.cpc.2014.05.026
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        Text: English
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      – SubjectFull: Asynchronous circuits
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              Text: Oct2014
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