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Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators.

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Title: Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators.
Authors: da Rosa, Morgana Macedo Azevedo1, morgana.azevedo@sou.ucpel.edu.br, da Costa, Patrícia Ücker2, da Costa, Eduardo Antonio César1, Almeida, Sérgio J. M.1, Paim, Guilherme2, Bampi, Sergio2
Source: Analog Integrated Circuits & Signal Processing; Aug2022, Vol. 112 Issue 2, p247-261, 15p
Database: Applied Science & Technology Source
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  Availability: 0
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 158163937
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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        Value: 10.1007/s10470-022-02050-x
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        Text: English
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            NameFull: da Costa, Eduardo Antonio César
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            NameFull: Almeida, Sérgio J. M.
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              M: 08
              Text: Aug2022
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              Y: 2022
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