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A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits.

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Title: A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits.
Authors: Mazumder, Dipayan1, dmazumder8582@floridapoly.edu, Datta, Mithun1, Bodoh, Alexander C.1, Sakib, Ashiq A.1, asakib@floridapoly.edu
Source: Journal of Low Power Electronics & Applications; Mar2024, Vol. 14 Issue 1, p5, 24p
Database: Applied Science & Technology Source
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        Value: 10.3390/jlpea14010005
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        Text: English
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              Text: Mar2024
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