A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits.
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| Title: | A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits. |
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| Authors: | Mazumder, Dipayan1, dmazumder8582@floridapoly.edu, Datta, Mithun1, Bodoh, Alexander C.1, Sakib, Ashiq A.1, asakib@floridapoly.edu |
| Source: | Journal of Low Power Electronics & Applications; Mar2024, Vol. 14 Issue 1, p5, 24p |
| Database: | Applied Science & Technology Source |
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