P‐1.28: GOA‐AI:Designing the Size of Gate Driver on Array Circuits Using NSGA‐III(II) multi‐objective optimization algorithm framework Combined with Bayesian Optimization.

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Bibliographic Details
Title:	P‐1.28: GOA‐AI:Designing the Size of Gate Driver on Array Circuits Using NSGA‐III(II) multi‐objective optimization algorithm framework Combined with Bayesian Optimization.
Authors:	Chen, Yanling¹, Hu, Zhenbang², Zhou, Xiaoliang¹, Sun, Zhixin¹, Tan, Zhiwei¹, Liu, Yangxing²
Source:	SID Symposium Digest of Technical Papers; Jun2025 Supplement 1, Vol. 56, p792-796, 5p
Database:	Applied Science & Technology Source

Description
ISSN:	0097966X
DOI:	10.1002/sdtp.18933