VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications.
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| Title: | VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications. |
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| Authors: | Perumal, Vivek Karthick1, vivekmalar@gmail.com, Jayabalan, Ramesh2, Paul, Eldho3, Selvaraj, Dhanasekaran4, R., Palanisamy |
| Source: | Journal of Electrical & Computer Engineering; 10/24/2025, Vol. 2025, p1-11, 11p |
| Database: | Applied Science & Technology Source |
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| ISSN: | 20900147 |
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| DOI: | 10.1155/jece/2638291 |