VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications.
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| Title: | VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications. |
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| Authors: | Perumal, Vivek Karthick1, vivekmalar@gmail.com, Jayabalan, Ramesh2, Paul, Eldho3, Selvaraj, Dhanasekaran4, R., Palanisamy |
| Source: | Journal of Electrical & Computer Engineering; 10/24/2025, Vol. 2025, p1-11, 11p |
| Database: | Applied Science & Technology Source |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 188874972 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22Perumal%2C+Vivek+Karthick%22">Perumal, Vivek Karthick</searchLink><relatesTo>1</relatesTo>, <i>vivekmalar@gmail.com</i><br /><searchLink fieldCode="AU" term="%22Jayabalan%2C+Ramesh%22">Jayabalan, Ramesh</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AU" term="%22Paul%2C+Eldho%22">Paul, Eldho</searchLink><relatesTo>3</relatesTo><br /><searchLink fieldCode="AU" term="%22Selvaraj%2C+Dhanasekaran%22">Selvaraj, Dhanasekaran</searchLink><relatesTo>4</relatesTo><br /><searchLink fieldCode="AU" term="%22R%2E%2C+Palanisamy%22">R., Palanisamy</searchLink> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+Electrical+%26+Computer+Engineering%22">Journal of Electrical & Computer Engineering</searchLink>; 10/24/2025, Vol. 2025, p1-11, 11p |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1155/jece/2638291 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 11 StartPage: 1 Titles: – TitleFull: VLSI Implementation of High‐Speed and Area‐Efficient Multiplierless Address Generation Architecture for Deinterleaver in WiMAX Applications. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Perumal, Vivek Karthick – PersonEntity: Name: NameFull: Jayabalan, Ramesh – PersonEntity: Name: NameFull: Paul, Eldho – PersonEntity: Name: NameFull: Selvaraj, Dhanasekaran – PersonEntity: Name: NameFull: R., Palanisamy IsPartOfRelationships: – BibEntity: Dates: – D: 24 M: 10 Text: 10/24/2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 20900147 Numbering: – Type: volume Value: 2025 Titles: – TitleFull: Journal of Electrical & Computer Engineering Type: main |
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