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Simulation study of the noise figure of nanometer-gate nMOS transistors near the scaling limit

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Bibliographic Details
Title: Simulation study of the noise figure of nanometer-gate nMOS transistors near the scaling limit
Authors: Cai, M., mcai@ucsd.edu, Liu, M.1, Taur, Y.1
Source: Solid-State Electronics; May2007, Vol. 51 Issue 5, p667-673, 7p
Database: Applied Science & Technology Source
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