A 48.1 ps HEMT DCFL NAND circuit with a dual gate structure.
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| Title: | A 48.1 ps HEMT DCFL NAND circuit with a dual gate structure. |
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| Authors: | Suehiro, H., Miyata, T., Hara, N. |
| Source: | Solid-State Electronics; September 1995, Vol. 38, p1717-1721, 5p |
| Database: | Applied Science & Technology Source |
| ISSN: | 00381101 |
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| DOI: | 10.1016/0038-1101(95)00040-Z |
