APA (7th ed.) Citation

Suehiro, H., Miyata, T., & Hara, N. (1995). A 48.1 ps HEMT DCFL NAND circuit with a dual gate structure. Solid-State Electronics, 38, 1717. https://doi.org/10.1016/0038-1101(95)00040-Z

Chicago Style (17th ed.) Citation

Suehiro, H., T. Miyata, and N. Hara. "A 48.1 Ps HEMT DCFL NAND Circuit with a Dual Gate Structure." Solid-State Electronics 38 (1995): 1717. https://doi.org/10.1016/0038-1101(95)00040-Z.

MLA (9th ed.) Citation

Suehiro, H., et al. "A 48.1 Ps HEMT DCFL NAND Circuit with a Dual Gate Structure." Solid-State Electronics, vol. 38, 1995, p. 1717, https://doi.org/10.1016/0038-1101(95)00040-Z.