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A 22-nm Damascene-Gate MOSFET Fabrication With 0.9-nm EOT and Local Channel Implantation.

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Bibliographic Details
Title: A 22-nm Damascene-Gate MOSFET Fabrication With 0.9-nm EOT and Local Channel Implantation.
Authors: Choe, Jeong-Dong, Lee, Chang-Sub, Kim, Sung-Ho
Source: IEEE Electron Device Letters; March 2003, Vol. 24 Issue 3, p195-197, 3p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 501007484
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: A 22-nm Damascene-Gate MOSFET Fabrication With 0.9-nm EOT and Local Channel Implantation.
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  Data: <searchLink fieldCode="AU" term="%22Choe%2C+Jeong-Dong%22">Choe, Jeong-Dong</searchLink><br /><searchLink fieldCode="AU" term="%22Lee%2C+Chang-Sub%22">Lee, Chang-Sub</searchLink><br /><searchLink fieldCode="AU" term="%22Kim%2C+Sung-Ho%22">Kim, Sung-Ho</searchLink>
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  Data: <searchLink fieldCode="JN" term="%22IEEE+Electron+Device+Letters%22">IEEE Electron Device Letters</searchLink>; March 2003, Vol. 24 Issue 3, p195-197, 3p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=501007484
RecordInfo BibRecord:
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    Identifiers:
      – Type: doi
        Value: 10.1109/LED.2003.811401
    Languages:
      – Code: eng
        Text: English
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      Pagination:
        PageCount: 3
        StartPage: 195
    Titles:
      – TitleFull: A 22-nm Damascene-Gate MOSFET Fabrication With 0.9-nm EOT and Local Channel Implantation.
        Type: main
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          Name:
            NameFull: Choe, Jeong-Dong
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            NameFull: Lee, Chang-Sub
      – PersonEntity:
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            NameFull: Kim, Sung-Ho
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            – D: 01
              M: 03
              Text: March 2003
              Type: published
              Y: 2003
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              Value: 24
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              Value: 3
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            – TitleFull: IEEE Electron Device Letters
              Type: main
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