Low-power register-exchange survivor memory architectures for Viterbi decoders.

Saved in:

Bibliographic Details
Title:	Low-power register-exchange survivor memory architectures for Viterbi decoders.
Authors:	Shieh, M.-D., Wang, T.-P., Yang, D.-W.
Source:	IET Circuits, Devices & Systems; April 2009, Vol. 3 Issue 2, p83-90, 8p
Database:	Applied Science & Technology Source

Description
ISSN:	1751858X
DOI:	10.1049/iet-cds.2008.0262