Popa, D., Post, G., & Noirie, L. (2009). A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching. Bell Labs Technical Journal, 14(2), 81. https://doi.org/10.1002/bltj.20374
Chicago Style (17th ed.) CitationPopa, Daniel, Georg Post, and Ludovic Noirie. "A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching." Bell Labs Technical Journal 14, no. 2 (2009): 81. https://doi.org/10.1002/bltj.20374.
MLA (9th ed.) CitationPopa, Daniel, et al. "A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching." Bell Labs Technical Journal, vol. 14, no. 2, 2009, p. 81, https://doi.org/10.1002/bltj.20374.
Warning: These citations may not always be 100% accurate.