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A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching.

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Bibliographic Details
Title: A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching.
Authors: Popa, Daniel, Post, Georg, Noirie, Ludovic
Source: Bell Labs Technical Journal; Summer2009, Vol. 14 Issue 2, p81-95, 15p
Database: Applied Science & Technology Source
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  Availability: 0
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DbLabel: Applied Science & Technology Source
An: 501462266
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PubType: Academic Journal
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        Value: 10.1002/bltj.20374
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        Text: English
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        StartPage: 81
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      – TitleFull: A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching.
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            NameFull: Popa, Daniel
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            NameFull: Post, Georg
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              Text: Summer2009
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              Y: 2009
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