APA (7th ed.) Citation

Pomeranz, I., & Reddy, S. M. (2011). Fixed-State Tests for Delay Faults in Scan Designs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19(1), 142. https://doi.org/10.1109/TVLSI.2009.2030811

Chicago Style (17th ed.) Citation

Pomeranz, Irith, and Sudhakar M. Reddy. "Fixed-State Tests for Delay Faults in Scan Designs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19, no. 1 (2011): 142. https://doi.org/10.1109/TVLSI.2009.2030811.

MLA (9th ed.) Citation

Pomeranz, Irith, and Sudhakar M. Reddy. "Fixed-State Tests for Delay Faults in Scan Designs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 1, 2011, p. 142, https://doi.org/10.1109/TVLSI.2009.2030811.