APA (7th ed.) Citation

Ujwal, B. S., Sanjana, H. S., Thanishka, K., Shirur, Y. J. M., & Munavalli, J. R. (2026). Evaluation of design and verification techniques for synthesizable low power 8-Bit RISC microprocessors. AIP Conference Proceedings, 3426(1), 1. https://doi.org/10.1063/5.0327664

Chicago Style (17th ed.) Citation

Ujwal, B. S., H. S. Sanjana, K. Thanishka, Yasha Jyothi M. Shirur, and Jyoti R. Munavalli. "Evaluation of Design and Verification Techniques for Synthesizable Low Power 8-Bit RISC Microprocessors." AIP Conference Proceedings 3426, no. 1 (2026): 1. https://doi.org/10.1063/5.0327664.

MLA (9th ed.) Citation

Ujwal, B. S., et al. "Evaluation of Design and Verification Techniques for Synthesizable Low Power 8-Bit RISC Microprocessors." AIP Conference Proceedings, vol. 3426, no. 1, 2026, p. 1, https://doi.org/10.1063/5.0327664.