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A Flexible Framework for the Automatic Generation of SBST Programs.

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Bibliographic Details
Title:	A Flexible Framework for the Automatic Generation of SBST Programs.
Authors:	Riefert, Andreas¹, Cantoro, Riccardo², Sauer, Matthias¹, Sonza Reorda, Matteo², Becker, Bernd¹
Source:	IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Oct2016, Vol. 24 Issue 10, p3055-3066. 12p.
Subjects:	Microprocessor testing, Built-in self tests (Engineering), Manufacturing defects, Computers testing, Automatic test equipment, Prevention
Abstract:	Software-based self-test (SBST) techniques are used to test processors and processor cores against permanent faults introduced by the manufacturing process or to perform in-field test in safety-critical applications. However, the generation of an SBST program is usually associated with high costs as it requires significant manual effort of a skilled engineer with in-depth knowledge about the processor under test. In this paper, we propose an approach for the automatic generation of SBST programs. First, we detail an automatic test pattern generation (ATPG) framework for the generation of functional test sequences. Second, we describe the extension of this framework with the concept of a validity checker module (VCM), which allows the specification of constraints with regard to the generated sequences. Third, we use the VCM to express typical constraints that exist when SBST is adopted for in-field test. In our experimental results, we evaluate the proposed approach with a microprocessor without interlocked pipeline stages (MIPS)-like microprocessor. The results show that the proposed method is the first approach able to automatically generate SBST programs for both end-of-manufacturing and in-field test whose fault efficiency is superior to those produced by state-of-the-art manual approaches. [ABSTRACT FROM PUBLISHER]
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Database:	Engineering Source

Description
Abstract:	Software-based self-test (SBST) techniques are used to test processors and processor cores against permanent faults introduced by the manufacturing process or to perform in-field test in safety-critical applications. However, the generation of an SBST program is usually associated with high costs as it requires significant manual effort of a skilled engineer with in-depth knowledge about the processor under test. In this paper, we propose an approach for the automatic generation of SBST programs. First, we detail an automatic test pattern generation (ATPG) framework for the generation of functional test sequences. Second, we describe the extension of this framework with the concept of a validity checker module (VCM), which allows the specification of constraints with regard to the generated sequences. Third, we use the VCM to express typical constraints that exist when SBST is adopted for in-field test. In our experimental results, we evaluate the proposed approach with a microprocessor without interlocked pipeline stages (MIPS)-like microprocessor. The results show that the proposed method is the first approach able to automatically generate SBST programs for both end-of-manufacturing and in-field test whose fault efficiency is superior to those produced by state-of-the-art manual approaches. [ABSTRACT FROM PUBLISHER]
ISSN:	10638210
DOI:	10.1109/TVLSI.2016.2538800