A Flexible Framework for the Automatic Generation of SBST Programs.
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| Title: | A Flexible Framework for the Automatic Generation of SBST Programs. |
|---|---|
| Authors: | Riefert, Andreas1, Cantoro, Riccardo2, Sauer, Matthias1, Sonza Reorda, Matteo2, Becker, Bernd1 |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Oct2016, Vol. 24 Issue 10, p3055-3066. 12p. |
| Subjects: | Microprocessor testing, Built-in self tests (Engineering), Manufacturing defects, Computers testing, Automatic test equipment, Prevention |
| Abstract: | Software-based self-test (SBST) techniques are used to test processors and processor cores against permanent faults introduced by the manufacturing process or to perform in-field test in safety-critical applications. However, the generation of an SBST program is usually associated with high costs as it requires significant manual effort of a skilled engineer with in-depth knowledge about the processor under test. In this paper, we propose an approach for the automatic generation of SBST programs. First, we detail an automatic test pattern generation (ATPG) framework for the generation of functional test sequences. Second, we describe the extension of this framework with the concept of a validity checker module (VCM), which allows the specification of constraints with regard to the generated sequences. Third, we use the VCM to express typical constraints that exist when SBST is adopted for in-field test. In our experimental results, we evaluate the proposed approach with a microprocessor without interlocked pipeline stages (MIPS)-like microprocessor. The results show that the proposed method is the first approach able to automatically generate SBST programs for both end-of-manufacturing and in-field test whose fault efficiency is superior to those produced by state-of-the-art manual approaches. [ABSTRACT FROM PUBLISHER] |
| Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 118364322 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: A Flexible Framework for the Automatic Generation of SBST Programs. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Riefert%2C+Andreas%22">Riefert, Andreas</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Cantoro%2C+Riccardo%22">Cantoro, Riccardo</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Sauer%2C+Matthias%22">Sauer, Matthias</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Sonza+Reorda%2C+Matteo%22">Sonza Reorda, Matteo</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Becker%2C+Bernd%22">Becker, Bernd</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Oct2016, Vol. 24 Issue 10, p3055-3066. 12p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Microprocessor+testing%22">Microprocessor testing</searchLink><br /><searchLink fieldCode="DE" term="%22Built-in+self+tests+%28Engineering%29%22">Built-in self tests (Engineering)</searchLink><br /><searchLink fieldCode="DE" term="%22Manufacturing+defects%22">Manufacturing defects</searchLink><br /><searchLink fieldCode="DE" term="%22Computers+testing%22">Computers testing</searchLink><br /><searchLink fieldCode="DE" term="%22Automatic+test+equipment%22">Automatic test equipment</searchLink><br /><searchLink fieldCode="DE" term="%22Prevention%22">Prevention</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Software-based self-test (SBST) techniques are used to test processors and processor cores against permanent faults introduced by the manufacturing process or to perform in-field test in safety-critical applications. However, the generation of an SBST program is usually associated with high costs as it requires significant manual effort of a skilled engineer with in-depth knowledge about the processor under test. In this paper, we propose an approach for the automatic generation of SBST programs. First, we detail an automatic test pattern generation (ATPG) framework for the generation of functional test sequences. Second, we describe the extension of this framework with the concept of a validity checker module (VCM), which allows the specification of constraints with regard to the generated sequences. Third, we use the VCM to express typical constraints that exist when SBST is adopted for in-field test. In our experimental results, we evaluate the proposed approach with a microprocessor without interlocked pipeline stages (MIPS)-like microprocessor. The results show that the proposed method is the first approach able to automatically generate SBST programs for both end-of-manufacturing and in-field test whose fault efficiency is superior to those produced by state-of-the-art manual approaches. [ABSTRACT FROM PUBLISHER] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TVLSI.2016.2538800 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 12 StartPage: 3055 Subjects: – SubjectFull: Microprocessor testing Type: general – SubjectFull: Built-in self tests (Engineering) Type: general – SubjectFull: Manufacturing defects Type: general – SubjectFull: Computers testing Type: general – SubjectFull: Automatic test equipment Type: general – SubjectFull: Prevention Type: general Titles: – TitleFull: A Flexible Framework for the Automatic Generation of SBST Programs. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Riefert, Andreas – PersonEntity: Name: NameFull: Cantoro, Riccardo – PersonEntity: Name: NameFull: Sauer, Matthias – PersonEntity: Name: NameFull: Sonza Reorda, Matteo – PersonEntity: Name: NameFull: Becker, Bernd IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 10 Text: Oct2016 Type: published Y: 2016 Identifiers: – Type: issn-print Value: 10638210 Numbering: – Type: volume Value: 24 – Type: issue Value: 10 Titles: – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems Type: main |
| ResultId | 1 |
