Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL.

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Title: Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL.
Authors: Dávila Guzmán, María Angélica1, Gran Tejero, Rubén1, Villarroya-Gaudó, María1, Suárez Gracia, Darío1, Nozal, Raúl2, Bosque, Jose Luis2
Source: Journal of Supercomputing. Mar2019, Vol. 75 Issue 3, p1732-1746. 15p.
Subjects: Heterogeneous computing, OpenCL (Computer program language), Computer scheduling, Field programmable gate arrays, Graphics processing units, Central processing units, Load balancing (Computer networks)
Abstract: Heterogeneous systems are the core architecture of most of the high-performance computing nodes, due to their excellent performance and energy efficiency. However, a key challenge that remains is programmability, specifically, releasing the programmer from the burden of managing data and devices with different architectures. To this end, we extend EngineCL to support FPGA devices. Based on OpenCL, EngineCL is a high-level framework providing load balancing among devices. Our proposal fully integrates FPGAs into the framework, enabling effective cooperation between CPU, GPU, and FPGA. With command overlapping and judicious data management, our work improves performance by up to 96% compared with single-device execution and delivers energy-delay gains of up to 37%. In addition, adopting FPGAs does not require programmers to make big changes in their applications because the extensions do not modify the user-facing interface of EngineCL. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
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Abstract:Heterogeneous systems are the core architecture of most of the high-performance computing nodes, due to their excellent performance and energy efficiency. However, a key challenge that remains is programmability, specifically, releasing the programmer from the burden of managing data and devices with different architectures. To this end, we extend EngineCL to support FPGA devices. Based on OpenCL, EngineCL is a high-level framework providing load balancing among devices. Our proposal fully integrates FPGAs into the framework, enabling effective cooperation between CPU, GPU, and FPGA. With command overlapping and judicious data management, our work improves performance by up to 96% compared with single-device execution and delivers energy-delay gains of up to 37%. In addition, adopting FPGAs does not require programmers to make big changes in their applications because the extensions do not modify the user-facing interface of EngineCL. [ABSTRACT FROM AUTHOR]
ISSN:09208542
DOI:10.1007/s11227-019-02768-y