Design of Memristor-Based Combinational Logic Circuits.

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Bibliographic Details
Title:	Design of Memristor-Based Combinational Logic Circuits.
Authors:	Liu, Gongzhi¹ (AUTHOR), Shen, Shuhang¹ (AUTHOR), Jin, Peipei¹ (AUTHOR), Wang, Guangyi¹ (AUTHOR) wanggyi@hdu.edu.cn, Liang, Yan¹ (AUTHOR)
Source:	Circuits, Systems & Signal Processing. Dec2021, Vol. 40 Issue 12, p5825-5846. 22p.
Subjects:	CMOS logic circuits, Combinational circuits, Logic circuits, Computer logic, Video codecs, Memristors
Abstract:	This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., A · B ¯ ), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, we design some combinational logic circuits, including 1-bit comparator, 3-bit binary encoder, 3-bit binary decoder and 4:1 multiplexer. Furthermore, an improved multifunctional logic module is proposed, which contains one NMOS transistor and five memristors, and can implement AND, OR and XOR logic operations. Using this multifunctional logic module, a 4-bit comparator and a 1-bit full adder are designed. Finally, the proposed combinational logic circuits are verified by LTSPICE simulations. Compared with other memristor-based logic circuits and the traditional CMOS technology, the proposed logic circuits have made great progress in reducing delay, power consumption and the number of transistors. [ABSTRACT FROM AUTHOR]
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Database:	Engineering Source

Description
Abstract:	This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., A · B ¯ ), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, we design some combinational logic circuits, including 1-bit comparator, 3-bit binary encoder, 3-bit binary decoder and 4:1 multiplexer. Furthermore, an improved multifunctional logic module is proposed, which contains one NMOS transistor and five memristors, and can implement AND, OR and XOR logic operations. Using this multifunctional logic module, a 4-bit comparator and a 1-bit full adder are designed. Finally, the proposed combinational logic circuits are verified by LTSPICE simulations. Compared with other memristor-based logic circuits and the traditional CMOS technology, the proposed logic circuits have made great progress in reducing delay, power consumption and the number of transistors. [ABSTRACT FROM AUTHOR]
ISSN:	0278081X
DOI:	10.1007/s00034-021-01770-1