Bibliographic Details
| Title: |
Compact and low‐power ASIP design for lightweight PUF‐based authentication protocols. |
| Authors: |
Aysu, Aydin1 (AUTHOR) aydinay@vt.edu, Gulcan, Ege1 (AUTHOR), Moriyama, Daisuke2 (AUTHOR), Schaumont, Patrick1 (AUTHOR) |
| Source: |
IET Information Security (Wiley-Blackwell). Sep2016, Vol. 10 Issue 5, p232-241. 10p. |
| Subjects: |
Application-specific instruction-set processors, Application-specific integrated circuits, Instruction set processors, Logic design, Physical mobility |
| Abstract: |
There is a disconnection between the theory and the practice of lightweight physical unclonable function (PUF)‐based protocols. At a theoretical level, there exist several PUF‐based authentication protocols with unique features and novel efficiency claims, but most of these solutions lack real‐world implementations with simple performance figures. On the other hand, practical protocol implementations are ad‐hoc designs fixed to a specific functionality and with limited area optimisations. This work aims to bring these approaches on PUF protocols closer. The authors' contribution is twofold. First, they provide a novel ASIP (application‐specific instruction set processor) that can efficiently execute PUF‐based authentication protocols. The key novelty of the proposed ASIP is optimisation for area without degrading the performance. Second, they demonstrate the capability of their ASIP by mapping three secure PUF‐based authentication protocols and benchmark their execution time, memory footprint, communication overhead, and power/energy consumption. Their results demonstrate the advantage of ASIP over dedicated architectures and also as opposed to general‐purpose programming on an MSP430. The results further demonstrate various efficiency metrics that can be used to compare PUF‐based protocol implementations. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |