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On the Realization of Electronically Tunable Voltage‐Mode Instrumentation Amplifier Employing a Single Voltage Differencing Current Conveyor.

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Bibliographic Details
Title: On the Realization of Electronically Tunable Voltage‐Mode Instrumentation Amplifier Employing a Single Voltage Differencing Current Conveyor.
Authors: Ozer, Emre1 (AUTHOR) emreozer@itu.edu.tr, Yesil, Abdullah2 (AUTHOR), Kacar, Firat3 (AUTHOR)
Source: International Journal of Numerical Modelling. Sep/Oct2025, Vol. 38 Issue 5, p1-16. 16p.
Subjects: Differential amplifiers, Current conveyors, Complementary metal oxide semiconductors, Electronic circuit design
Abstract: This research paper introduces an innovative voltage‐mode instrumentation amplifier circuit employing a single voltage differencing current conveyor (VDCC) in conjunction with four grounded resistors. The designed circuit provides two output signals with opposing phases. This work includes comprehensive analyses encompassing both ideal and non‐ideal circuit behaviors. To validate the theoretical findings, we conducted SPICE simulations utilizing 0.18 μm CMOS process parameters. The proposed circuit exhibits a substantial differential‐mode gain of 32 dB and a notable bandwidth of 21.93 MHz. Furthermore, it demonstrates a remarkable common‐mode rejection ratio (CMRR) of 91.1 dB, with a CMRR bandwidth of 405.3 kHz. Operating within a ±0.9 V range, the circuit's power consumption remains notably low, measuring at a mere 0.6 mW. The circuit's robustness was rigorously tested through extensive simulations, and its performance under process–voltage–temperature variations was thoroughly assessed. To validate its practical viability, we conducted experimental tests using commercially available AD844 and LM13700 ICs. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:This research paper introduces an innovative voltage‐mode instrumentation amplifier circuit employing a single voltage differencing current conveyor (VDCC) in conjunction with four grounded resistors. The designed circuit provides two output signals with opposing phases. This work includes comprehensive analyses encompassing both ideal and non‐ideal circuit behaviors. To validate the theoretical findings, we conducted SPICE simulations utilizing 0.18 μm CMOS process parameters. The proposed circuit exhibits a substantial differential‐mode gain of 32 dB and a notable bandwidth of 21.93 MHz. Furthermore, it demonstrates a remarkable common‐mode rejection ratio (CMRR) of 91.1 dB, with a CMRR bandwidth of 405.3 kHz. Operating within a ±0.9 V range, the circuit's power consumption remains notably low, measuring at a mere 0.6 mW. The circuit's robustness was rigorously tested through extensive simulations, and its performance under process–voltage–temperature variations was thoroughly assessed. To validate its practical viability, we conducted experimental tests using commercially available AD844 and LM13700 ICs. [ABSTRACT FROM AUTHOR]
ISSN:08943370
DOI:10.1002/jnm.70124