Performance Comparison of SNSFET, H-Shaped NSFET, and Pyramidal H-Shaped NSFET: Device and Circuit Perspective.
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| Title: | Performance Comparison of SNSFET, H-Shaped NSFET, and Pyramidal H-Shaped NSFET: Device and Circuit Perspective. |
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| Authors: | Balasubrahmanyam, M.1 (AUTHOR), Goel, Ekta1 (AUTHOR) ektagoel@nitw.ac.in |
| Source: | Journal of Electronic Materials. Jan2026, Vol. 55 Issue 1, p1234-1263. 30p. |
| Subjects: | CMOS integrated circuits, Field-effect transistors |
| Abstract: | This study describes a thorough performance assessment of advanced nanosheet field-effect transistor (NSFET) architectures, encompassing the stacked nanosheet FET (SNSFET), the H-shaped NSFET (HS-NSFET), and the pyramidal H-shaped NSFET (PHS-NSFET), accompanied by a systematic analysis of variations in channel length and width. Device attributes are examined in both DC and analog/RF domains through calibrated TCAD simulations. The research examines electrostatic integrity, drive current capacity, ION/IOFF ratio, subthreshold swing (SS), drain-induced barrier lowering (DIBL), and the influence of short-channel effects due to aggressive channel scaling. Analog and RF parameters, including transconductance efficiency, intrinsic gain, cutoff frequency (fT), gain frequency product, transconductance generation factor (TGF), and maximum oscillation frequency (fMAX), have been analyzed to assess suitability for high-performance and low-power applications. Results indicate that, whereas traditional NSFETs demonstrate robust gate control, they experience performance deterioration with scaling. The H-shaped NSFET enhances electrostatics and thermal management by elongated H-shaped channels, resulting in superior suppression of DIBL and SS. The pyramidal H-shaped NSFET exhibits exceptional robustness to fluctuations in channel length and breadth, resulting in an increased ION/IOFF ratio, diminished short-channel sensitivity, and higher fT and fMAX, positioning it as a strong contender for sub-5-nm technology nodes. The dynamic and average power consumption of PHS-NSFET are less in relation to SNSFET and HS-NSFET. In circuit-level analysis of CMOS inverters and five-stage ring oscillators, PHS-NSFET has a better performance compared to SNSFET and HS-NSFET. This comparative research identifies the pyramidal H-shaped NSFET as the most advantageous architecture, effectively balancing DC robustness and RF performance for forthcoming nanoscale CMOS systems. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
| Abstract: | This study describes a thorough performance assessment of advanced nanosheet field-effect transistor (NSFET) architectures, encompassing the stacked nanosheet FET (SNSFET), the H-shaped NSFET (HS-NSFET), and the pyramidal H-shaped NSFET (PHS-NSFET), accompanied by a systematic analysis of variations in channel length and width. Device attributes are examined in both DC and analog/RF domains through calibrated TCAD simulations. The research examines electrostatic integrity, drive current capacity, ION/IOFF ratio, subthreshold swing (SS), drain-induced barrier lowering (DIBL), and the influence of short-channel effects due to aggressive channel scaling. Analog and RF parameters, including transconductance efficiency, intrinsic gain, cutoff frequency (fT), gain frequency product, transconductance generation factor (TGF), and maximum oscillation frequency (fMAX), have been analyzed to assess suitability for high-performance and low-power applications. Results indicate that, whereas traditional NSFETs demonstrate robust gate control, they experience performance deterioration with scaling. The H-shaped NSFET enhances electrostatics and thermal management by elongated H-shaped channels, resulting in superior suppression of DIBL and SS. The pyramidal H-shaped NSFET exhibits exceptional robustness to fluctuations in channel length and breadth, resulting in an increased ION/IOFF ratio, diminished short-channel sensitivity, and higher fT and fMAX, positioning it as a strong contender for sub-5-nm technology nodes. The dynamic and average power consumption of PHS-NSFET are less in relation to SNSFET and HS-NSFET. In circuit-level analysis of CMOS inverters and five-stage ring oscillators, PHS-NSFET has a better performance compared to SNSFET and HS-NSFET. This comparative research identifies the pyramidal H-shaped NSFET as the most advantageous architecture, effectively balancing DC robustness and RF performance for forthcoming nanoscale CMOS systems. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 03615235 |
| DOI: | 10.1007/s11664-025-12545-8 |
