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Design of low power 1-bit full adder for biomedical applications.

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Title: Design of low power 1-bit full adder for biomedical applications.
Authors: Swetha, Siliveri1 (AUTHOR) s.swetha@cvr.ac.in, Pranay Bhargav, Andoju1 (AUTHOR)
Source: International Journal of Electronics Letters. Mar2026, Vol. 14 Issue 1, p1-12. 12p.
Subjects: Medical electronics, Transistors, Wearable technology, Energy consumption, Acquisition of data, Computer logic, Medical equipment
Abstract: This paper presents a low-power 15-transistor 1-bit full adder using Modified Gate Diffusion Input (MGDI) logic and Fin Field-Effect Transistor (FinFET) technology. The design targets biomedical applications, such as wearable and implantable devices, where energy efficiency is crucial due to limited power budgets and thermal constraints. By leveraging FinFETs, the design achieves improved short-channel control and reduced leakage, while MGDI logic minimises transistor count and dynamic power consumption. The proposed full adder is evaluated using Cadence Virtuoso in both 18 nm FinFET and 90 nm CMOS technologies at 1.0 V and 10 MHz. It achieves ultra-low power consumption—0.402 µW in FinFET and 0.609 µW in CMOS – representing a 99.9% reduction compared to a conventional buffered adder. The delay is 67.63 ps, and the Power-Delay Product (PDP) is 27.15 × 10−18 J, indicating a 98.6% improvement over the GDI Full Swing Adder. The performance of the proposed full adder was evaluated in the Wallace Tree encoder and was observed to be working efficiently with only 7.11ps. This significantly improves the energy efficiency and responsiveness of real-time biomedical signal acquisition systems such as ECG and EEG, making the design ideal for next-generation low-power healthcare devices. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:This paper presents a low-power 15-transistor 1-bit full adder using Modified Gate Diffusion Input (MGDI) logic and Fin Field-Effect Transistor (FinFET) technology. The design targets biomedical applications, such as wearable and implantable devices, where energy efficiency is crucial due to limited power budgets and thermal constraints. By leveraging FinFETs, the design achieves improved short-channel control and reduced leakage, while MGDI logic minimises transistor count and dynamic power consumption. The proposed full adder is evaluated using Cadence Virtuoso in both 18 nm FinFET and 90 nm CMOS technologies at 1.0 V and 10 MHz. It achieves ultra-low power consumption—0.402 µW in FinFET and 0.609 µW in CMOS – representing a 99.9% reduction compared to a conventional buffered adder. The delay is 67.63 ps, and the Power-Delay Product (PDP) is 27.15 × 10−18 J, indicating a 98.6% improvement over the GDI Full Swing Adder. The performance of the proposed full adder was evaluated in the Wallace Tree encoder and was observed to be working efficiently with only 7.11ps. This significantly improves the energy efficiency and responsiveness of real-time biomedical signal acquisition systems such as ECG and EEG, making the design ideal for next-generation low-power healthcare devices. [ABSTRACT FROM AUTHOR]
ISSN:21681724
DOI:10.1080/21681724.2025.2559243