Mask aligners in advanced packaging.
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| Title: | Mask aligners in advanced packaging. |
|---|---|
| Authors: | Tonnies, Dietrich, Topper, Michael |
| Source: | Solid State Technology. Mar98, Vol. 41 Issue 3, pS13. 4p. 6 Color Photographs, 9 Black and White Photographs, 1 Diagram. |
| Subjects: | Photolithography, Integrated circuits |
| Abstract: | Demonstrates the efficiency of photolithography by proximity printing with a mask aligner in the fabrication of high-density interconnect layers and tape automated bonding (TAB) or solder bumps in the integrated circuits industry. Chip scale packaging (CSP) technology developed at the Technical University and the Fraunhofer Institute IZM in Berlin, Germany; Combination of multichip modules (MCM) and MCM-D substrates. |
| Database: | Engineering Source |
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| FullText | Text: Availability: 1 |
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| Header | DbId: egs DbLabel: Engineering Source An: 403802 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Mask aligners in advanced packaging. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Tonnies%2C+Dietrich%22">Tonnies, Dietrich</searchLink><br /><searchLink fieldCode="AR" term="%22Topper%2C+Michael%22">Topper, Michael</searchLink> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Solid+State+Technology%22">Solid State Technology</searchLink>. Mar98, Vol. 41 Issue 3, pS13. 4p. 6 Color Photographs, 9 Black and White Photographs, 1 Diagram. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Photolithography%22">Photolithography</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Demonstrates the efficiency of photolithography by proximity printing with a mask aligner in the fabrication of high-density interconnect layers and tape automated bonding (TAB) or solder bumps in the integrated circuits industry. Chip scale packaging (CSP) technology developed at the Technical University and the Fraunhofer Institute IZM in Berlin, Germany; Combination of multichip modules (MCM) and MCM-D substrates. |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=403802 |
| RecordInfo | BibRecord: BibEntity: Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 4 StartPage: S13 Subjects: – SubjectFull: Photolithography Type: general – SubjectFull: Integrated circuits Type: general Titles: – TitleFull: Mask aligners in advanced packaging. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Tonnies, Dietrich – PersonEntity: Name: NameFull: Topper, Michael IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 03 Text: Mar98 Type: published Y: 1998 Identifiers: – Type: issn-print Value: 0038111X Numbering: – Type: volume Value: 41 – Type: issue Value: 3 Titles: – TitleFull: Solid State Technology Type: main |
| ResultId | 1 |