Bibliographic Details
| Title: |
Centip3De: A 64-Core, 3D Stacked Near-Threshold System. |
| Authors: |
Dreslinski, Ronald G.1, Fick, David1, Giridhar, Bharan1, Kim, Gyouho1, Seo, Sangwon1, Fojtik, Matthew1, Satpathy, Sudhir1, Lee, Yoonmyung1, Kim, Daeyeon1, Liu, Nurrachman1, Wieckowski, Michael1, Chen, Gregory1, Sylvester, Dennis1, Blaauw, David1, Mudge, Trevor1 |
| Source: |
IEEE Micro. Mar2013, Vol. 33 Issue 2, p8-16. 9p. |
| Subjects: |
Microprocessors, Dynamic random access memory, Energy consumption, Integrated circuit interconnections, Bandwidths |
| Abstract: |
Centip3De uses the synergy between 3D integration and near-threshold computing to create a reconfigurable system that provides both energy-efficient operation and techniques to address single-thread performance bottlenecks. The original Centip3De design is a seven-layer 3D stacked design with 128 cores and 256 Mbytes of DRAM. Silicon results show a two-layer, 64-core system in 130-nm technology, which achieved an energy efficiency of 3,930 DMIPS/W. [ABSTRACT FROM PUBLISHER] |
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| Database: |
Engineering Source |
