CMOS compatible probabilistic computing hardware with cointegrated reconfigurable p-bits and synapse arrays.

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Bibliographic Details
Title: CMOS compatible probabilistic computing hardware with cointegrated reconfigurable p-bits and synapse arrays.
Authors: Park JY; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, Republic of Korea., Lee JH; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, Republic of Korea., Lee JM; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, Republic of Korea., Park KN; Department of Electronic Engineering, College of Engineering, Hanyang University, Seoul, Republic of Korea., Kim S; Division of Electronic and Semiconductor Engineering, College of Engineering, Ewha Womans University, Seoul, Republic of Korea., Han JK; Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, Republic of Korea. joonkyuhan@snu.ac.kr.
Source: Nature communications [Nat Commun] 2026 Apr 11; Vol. 17 (1). Date of Electronic Publication: 2026 Apr 11.
Publication Type: Journal Article
Journal Info: Publisher: Nature Pub. Group Country of Publication: England NLM ID: 101528555 Publication Model: Electronic Cited Medium: Internet ISSN: 2041-1723 (Electronic) Linking ISSN: 20411723 NLM ISO Abbreviation: Nat Commun Subsets: MEDLINE; PubMed not MEDLINE
Database: MEDLINE Ultimate
Description
ISSN:2041-1723
DOI:10.1038/s41467-026-71906-x